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Baris 51: * Computer Architecture: A Quantitative Approach<ref name="quantitative"/> * {{cite book\|last=Patterson \|first=David A. \|last2=Hennessy \|first2=John L. \|title=Computer Organization and Design: The Hardware/software Interface \|publisher=Morgan Kaufmann \|isbn=0-12-370606-8}} * {{cite conference\|last=Gharachorloo \|first=Kourosh \|author2=D. Lenoski \|author3=J. Laudon \|author4=P. Gibbons \|author5=A. Gupta \|author6=J. Hennessy \|title=Memory consistency and event ordering in scalable shared-memory multiprocessors \|booktitle=Proceedings of the 17th annual international symposium on Computer Architecture \|publisher=International Symposium on Computer Architecture \|pages=15–26 \|date=1990}} * {{cite conference\|last=Lenoski \|first=Daniel \|author2=J. Laudon \|author3=K. Gharachorloo \|author4=A. Gupta \|author5=J. Hennessy \|title=The directory-based cache coherence protocol for the DASH multiprocessor \|booktitle=Proceedings of the 17th annual international symposium on Computer Architecture \|publisher=International Symposium on Computer Architecture \|pages=148–159 \|date=1990}}

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